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mar 23, 2007 revised to apr 16, 2007 page 1 of 26 www.power-one.com ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a applications ? intermediate bus architectures ? telecommunications ? data communications ? servers, workstations ? distributed power architectures benefits ? high efficiency ? no heat sink required ? reduces total solution board area ? tape and reel packing ? compatible with pick & place equipment the products: y-series features ? rohs lead-free solder and lead-solder-exempted products are available ? delivers up to 10 a (50 w) ? no derating up to 85 c (70 c for 5 v output) ? surface-mount package ? industry-standard footprint and pinout ? small size and low profile: 1.30? x 0.53? x 0.314? (33.02 x 13.46 x 7.98mm) ? weight: 0.22 oz [6.12 g] ? start-up into pre-biased output ? no minimum load required ? output voltage trim +/-10% ? operating ambient temperature: -40 c to 85 c ? remote output sense ? remote on/off (positive or negative) ? fixed-frequency operation ? auto-reset output overcurrent protection ? auto-reset overtemperature protection ? high reliability, mtbf = tbd million hours ? all materials meet ul94, v-0 flammability rating ? ul 60950 recognition in u.s. & canada, and demko certification per iec/en 60950 description the ynl12s100xy non-isolated dc-dc converters deliv er up to 10 a of output current in an industry- standard surface-mount package. the ynl12s100xy c onverters operate from a 9.6 ? 14 vdc input. these converters are ideal choices for intermediate bus architectures where point-of-load power delivery is generally a requirement. within the ynl12s100xy family, converters come in i ndividual output voltage versions, allowing coverage of the output voltage range from 1.0 to 5.0 v. each ve rsion is capable of providing an extremely tight, highly regulated, and trimmable output. the ynl12s100xy converters provide exceptional thermal performance, even in high temperature environments with minimal airflow. no derating is required up to 85 o c (up to 70 o c for 5 v output). this is accomplished through the use of circuitry, packagi ng, and processing techniques to achieve ultra-high efficiency, excellent thermal management, and a very low body profile. the low body profile and the preclusion of heat sinks mi nimize impedance to system airflow, thus enhancing cooling for both upstream and downstream devices. the use of 100% automation for assembly, coupled with advanced power electronics and therma l design, results in a product with extremely high reliability.
mar 23, 2007 revised to apr 16, 2007 page 2 of 26 www.power-one.com ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a electrical specifications conditions: t a = 25 oc, airflow= 200 lfm (1 m/s), vin= 12 vdc, v out = 1.0 - 5.0 v, unles s otherwise specified. parameter notes min typ max units absolute maximum ratings input voltage continuous -0.3 15 vdc operating ambient temperature -40 85 c storage temperature -55 125 c feature characteristics switching frequency 300 khz output voltage trim range see trim equations -10 +10 % remote sense compensation 0.5 vdc turn-on delay time full resistive load with vin = (converter enabled, then vin applied) from vin = vin(min) to vo=0.1* vo(nom) 3 ms with enable (vin = vin(nom) applied, then enabled) from enable to vo=0.1*vo(nom) 3 ms rise time from 10% to 90%, full resistive load 4 ms on/off control (positive logic) 1 converter off -5 0.8 vdc converter on 2.4 v in vdc on/off control (negative logic) 1 converter off 2.4 v in vdc converter on -5 0.8 vdc note: 1. converter is on if on/off pin is left open.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 3 of 26 www.power-one.com electrical specifications (continued) conditions: t a = 25 oc, airflow= 200 lfm (1 m/s), vin = 12 vdc, v out = 1.0 - 5.0 v, unles s otherwise specified. parameter notes min typ max units input characteristics operating input voltage range 9.6 12 14 vdc input under voltage lockout turn-on threshold 9.0 vdc turn-off threshold 8.5 vdc maximum input current 10 adc out @ 9.6 vdc in v out = 5.0 vdc 5.5 adc v out = 3.3 vdc 3.7 adc v out = 2.5 vdc 2.8 adc v out = 2.0 vdc 2.3 adc v out = 1.8 vdc 2.1 adc v out = 1.5 vdc 1.8 adc v out = 1.2 vdc 1.5 adc v out = 1.0 vdc 1.3 adc input stand-by current (converter disabled) 5 ma input no load current (converter enabled) v out = 5.0 vdc 76 ma v out = 3.3 vdc 60 ma v out = 2.5 vdc 45 ma v out = 2.0 vdc 41 ma v out = 1.8 vdc 38 ma v out = 1.5 vdc 35 ma v out = 1.2 vdc 33 ma v out = 1.0 vdc 30 ma input reflected-ripple current - i s v out = 5.0 vdc 36 ma p-p see fig. f for setup. (bw = 20 mhz) v out = 3.3 vdc 34 ma p-p v out = 2.5 vdc 32 ma p-p v out = 2.0 vdc 31 ma p-p v out = 1.8 vdc 30 ma p-p v out = 1.5 vdc 29 ma p-p v out = 1.2 vdc 26 ma p-p v out = 1.0 vdc 23 ma p-p input voltage ripple rejection 120 hz 72 db
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 4 of 26 www.power-one.com electrical specifications (continued) conditions: t a = 25 oc, airflow = 200 lfm (1 m/s), vin=12 vdc, v out = 1.0 - 5.0v, unless otherwise specified. parameter notes min typ max units output characteristics output voltage set point (no load) -1.5 vout +1.5 %vout output regulation over line full resistive load 0.5 2 mv over load from no load to full load 5 12 mv output voltage range (over all operating input voltage, resistive load and temperature conditions until end of life ) -2.5 +2.5 %vout output ripple and noise - 20 mhz bandwidth (fig. f) over line, load, and temperature peak-to-peak v out = 1.0 vdc 10 20 mv p-p peak-to-peak v out = 5.0 vdc 25 40 mv p-p external load capacitance pl us full load (resistive) min. esr > 1 m ? 1000 f min. esr > 10 m ? 5000 f output current range 0 10 adc output current limit inception (i out ) 15 a output short- circuit current short=10 m ? , continuous 3 a rms dynamic response iout step from 5 a to 10 a with di/dt = 5 a/ s co = 10 f tant. + 1 f ceramic 150/(180 2 ) mv settling time (v out < 10% peak deviation) 30 s iout step change from 10 a ? 5 a with di/dt = -5 a/ s co = 10 f tant. + 1 f ceramic 150/(180 2 ) mv settling time (v out < 10% peak deviation) 30 s iout step from 5 a to 10 a with di/dt = 5 a/ s co = 330 f polymer capacitors 100/(120 2 ) mv settling time (v out < 10% peak deviation) 55 s iout step from 10 a ? 5 a with di/dt = -5 a/ s co = 330 f polymer capacitors 100/(120 2 ) mv settling time (v out < 10% peak deviation) 55 s efficiency full load (10 a) v out = 5.0 vdc 95.0 % v out = 3.3 vdc 94.0 % v out = 2.5 vdc 93.0 % v out = 2.0 vdc 91.5 % v out = 1.8 vdc 90.5 % v out = 1.5 vdc 89.5 % v out = 1.2 vdc 87.5 % v out = 1.0 vdc 86.0 % note: 2. for v out = 5.0v only.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 5 of 26 www.power-one.com operation input and output impedance the ynl12s100xy converter should be connected via a low impedance to the dc power source. in many applications, the inductance associated with the distribution from the power source to the input of the converter can affect the stability of the converter. it is recommended to use decoupling capacitors in order to ensure converter stability and reduce input ripple voltage. the converter has an internal input capacitance of 20 f with very low esr (ceramic capacitors). in a typical application, low - esr tantalum or pos capacitors will be sufficient to provide adequate ripple voltage filter ing at the input of the converter. however, very low esr ceramic capacitors 47 f-100 f are recommended at the input of the converter in order to minimize the input ripple voltage. they should be placed as close as possible to the input pins of the converter. the ynl12s10 has been designed for stable operation with no external capacitance as well with external capacitance. low esr ceramic capacitors placed as close as possible to the load (minimim of 47 f) are recommended for improved transient performance and lower output voltage ripple. it is important to keep low resistance and low inductance pcb traces for connecting load to the output pins of the converter in order to maintain good load regulation. on/off (pin 1) the on/off pin is used to turn the power converter on or off remotely via a system signal. there are two remote control options available, positive logic (standard option) and negative logic, and both are referenced to gnd. typical connections are shown in fig. a. r* is for negative logic option only rload vin control input vin vin gnd on/off sense (top view) converter trim vout r* nex - l series tm fig. a: circuit configuration for on/off function. the positive logic version turns the converter on when the on/off pin is at a logic high or left open, and turns the converter off when at a logic low or shorted to gnd. the negative logic version turns the converter on when the on/off pin is at a logic low or left open, and turns converter off when the on/off pin is at a logic high or connected to vin. on/off pin is internally pulled-up to vin for positive logic version, and pulled-down for negative logic version. a ttl or cmos logic gate, open collector (open drain) transistor can be used to drive on/off pin. when using open collector (open drain) transistor with a negative logic option, add a pull-up resistor (r*) of 75 k to vin as shown in fig. a; this device must be capable of: - sinking up to 0.2 ma at a low level voltage of 0.8v - sourcing up to 0.25 ma at a high logic level of 2.3v ? 5v - sourcing up to 0.75 ma when connected to vin. remote sense (pin 2) the remote sense feature of the converter compensates for voltage drops occurring only between vout pin of the converter and the load. the sense pin should be connected at the load or at the point where regulation is required (see fig. b). there is no sense feature on the output gnd return pin, where the solid ground plane should provide low voltage drop.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 6 of 26 www.power-one.com vin vin rw rw rload vin gnd on/off sense (top view) converter trim vout nex - l series tm fig. b: remote sense circuit configuration. if remote sensing is not required, the sense pin must be connected to the vout pin to ensure the converter will regulate at the specified output voltage. if these connections are not made, the module will deliver an output voltage that is slightly higher than the specified value. because the sense lead carries minimal current, large trace on the end-user board is not required. however, sense trace should be located close to a ground plane to minimize system noise and insure optimum performance. the maximum voltage between the sense pin and vout pin must not exceed 0.5v. when utilizing the remote sense feature, care must be taken not to exceed the maximum allowable output power ca pability of the converter, equal to the product of the nominal output voltage and the allowable output current for the given conditions. when using remote sense, the output voltage at the converter can be increased up to 0.5v above the nominal rating in order to maintain the required voltage across the load. therefore, the designer must, if necessary, decrease the maximum current (originally obtained from the derating curves) by the same percentage to ensure the converter?s actual output power remains at or below the maximum allowable output power. output voltage adjust /trim (pin 3) the output voltage can be adjusted up 10% or down 10% using external resistor. to trim up the output voltage, refer to fig. c. a trim resistor, r t-incr , should be connected between the trim pin (pin 3) and output gnd pin (pin 5), with a value of: 1 ) v - (v 5 . 10 r nom - o req - o incr t ? = ? [k ] where, = ? incr t r required value of trim-up resistor [k ] = ? req o v desired (trimmed) output voltage [v] = ? nom o v nominal output voltage [v] vin r t-incr rload converter vin gnd on/off sense (top view) trim vout nex - l series tm fig. c: configuration for increas ing output voltage. to trim down the output voltage (fig.d), a trim resistor, r t-decr , should be connected between the trim pin (pin 3) and sense pin (pin 2), with a value of: 1 ) v - (v 15 * 0.7) - (v r req - o nom - o req - o decr t ? = ? [k ] where, = ? decr t r required value of trim-down resistor [k ] rload vin r t-decr converter vin gnd on/off sense (top view) trim vout nex - l series tm fig. d: configuration for prog ramming output voltage. table 1 and table 2 provide the values of resistor for trimming up and down respectively. standard
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 7 of 26 www.power-one.com 1% and 5% resistors can be used for trimming. ground pin of the trim resistor should be connected directly to the converter gnd pin (pin 5) with no voltage drop in between. in table 1 and table 2, is a percentage of increase or decrease of nom o v ? . table1: trim-up resistor r t-incr [k ? ] nominal value of output voltage v 0-nom [v] [%] 1.0 1.2 1.5 1.8 2.0 2.5 3.3 5.0 1 1049 874 699 582 524 419 317 209 2 524 437 349 291 262 209 158 104 3 349 291 232 193 174 139 105 69 4 262 218 174 145 130 104 79 52 5 209 174 139 116 104 83 63 41 6 174 145 116 96 87 69 52 34 7 149 124 99 82 74 59 44 29 8 130 108 87 72 65 52 39 25 9 116 96 77 64 57 46 34 22 10 104 87 69 57 52 41 31 20 table 2: trim-down resistor r t-decr [k ? ] nominal value of output voltage v 0-nom [v] [%] 1.0 1.2 1.5 1.8 2.0 2.5 3.3 5.0 -1 434 609 784 901 959 1064 1166 1274 -2 209 297 384 442 472 524 575 629 -3 134 192 251 290 309 344 378 414 -4 97 140 184 213 228 254 279 307 -5 74 109 144 167 179 200 220 242 -6 59 88 117 137 147 164 181 199 -7 48 73 98 115 123 138 153 168 -8 40 62 84 99 106 119 132 145 -9 34 53 73 86 92 104 115 127 -10 29 47 64 76 82 92 102 113 protection features input undervoltage lockout input undervoltage lockout is standard with this converter. the converter will shut down when the input voltage drops below a pre-determined voltage; it will start automatically when vin returns to a specified range. the input voltage must be at least 9.6 v (typically 9 v) for the converter to turn on. once the converter has been turned on, it will shut off when the input voltage drops below typically 8.5 v. output overcurrent protection (ocp) the converter is protect ed against overcurrent and short-circuit conditions. upon sensing an over- current condition, the conv erter will enter hiccup mode. once an overload or short-circuit condition is removed, vout will return to nominal value. over-temperature protection (otp) the converter will shut down under an over- temperature condition to protect itself from overheating caused by operation outside the thermal derating curves, or operation in abnormal conditions such as system fan failure. after the converter has cooled to a safe operating temperature, it will aut omatically restart. safety requirements the converter meets north american and international safety regulatory requirements per ul60950 and en60950. the maximum dc voltage between any two pins is vin under all operating conditions. therefore, the unit has elv (extra low voltage) output; it meets selv requirements under the condition that all input voltages are elv. the converter is not internally fused. to comply with safety agencies requirements, a recognized fuse with a maximum rating of 15 amps must be used in series with the input line. characterization general information the converter has been characterized for many operational aspects, to include thermal derating (maximum load current as a function of ambient temperature and airflow) for vertical and horizontal mounting, efficiency, start-up and shutdown parameters, output ripple and noise, transient response to load step-change, overload and short circuit. the figures are numbered as fig. x.y, where x indicates the different output voltages, and y associates with specific pl ots (y = 1 for the vertical thermal derating, ?). for example, fig. x.1 will
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 8 of 26 www.power-one.com refer to the vertical ther mal derating for all the output voltages in general. the following pages contain specific plots or waveforms associated with the converter. additional comments for specific data are provided below. test conditions all thermal and efficiency data presented were taken with the converter soldered to a test board, specifically a 0.060? thick printed wiring board (pwb) with four layers. the top and bottom layers were not metalized. the two inner layers, comprising two-ounce copper, were used to provide traces for connect ivity to the converter. the lack of metalization on the outer layers as well as the limited thermal connection ensured that heat transfer from the converter to the pwb was minimized. this provides a worst-case but consistent scenario for thermal derating purposes. all measurements requiring airflow were made in vertical and horizontal wind tunnel facilities using infrared (ir) thermography and thermocouples for thermometry. ensuring components on the converter do not exceed their ratings is important to maintaining high reliability. if one anticipates operating the converter at or close to the maximum loads specified in the derating curves, it is prudent to check actual operating temperatures in the application. thermographic imaging is preferable; if this capability is not available, then thermocouples may be used. power-one recommends the use of awg #40 gauge thermocouples to ensure measurement accuracy. careful routing of the thermocouple leads will further minimize measurement error. refer to fig. e for optimum measuring thermocouple location. thermal derating load current vs. ambient temperature and airflow rates are given in figs. x.1 to x.2 for maximum temperature of 110c. ambient temperature was varied between 25c and 85c, with airflow rates from 30 to 500 lfm (0.15 m/s to 2.5 m/s), and vertical and horizontal converter mounting. the airflow during the testing is parallel to the short axis of the converter, going from pin 1 and pin 6 to pins 2 ? 5. for each set of conditions, the maximum load current was defined as the lowest of: (i) the output current at which either any mosfet temperature did not exceed a maximum specified temperature (110 c) as indicated by the thermographic image, or (ii) the maximum current rating of the converter (10 a) during normal operation, derating curves with maximum fet temperature less than or equal to 110 c should not be exceeded. temperature on the pcb at the thermocouple location shown in fig. e should not exceed 110 c in order to operate inside the derating curves. fig. e: location of the thermocoup le for thermal testing. efficiency figure x.3 shows the efficiency vs. load current plot for ambient temperature of 25 oc, airflow rate of 200 lfm (1 m/s) and input voltages of 9.6 v, 12 v, and 14 v. power dissipation fig. x.4 shows the power dissipation vs. load current plot for ta = 25 oc, airflow rate of 200 lfm (1 m/s) with vertical mounting and input voltages of 9.6 v, 12 v. and 14 v. ripple and noise the output voltage ripple waveform is measured at full rated load current. note that all output voltage waveforms are measured across a 1 f ceramic capacitor.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 9 of 26 www.power-one.com the output voltage ripple and input reflected ripple current waveforms are obtained using the test setup shown in fig. f. i s i c vout v source 1 f ceramic capacitor 1 h source inductance dc/dc converter 4x47 f ceramic capacitor 100 f ceramic capacitor c o c in nex - l series tm fig. f: test setup for measuring input reflected ripple currents, i s and i c and output voltage ripple.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 10 of 26 www.power-one.com ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 5.0v.1: available load current vs. ambient temperature and airflow rates for ynl12s10050 converter mounted vertically with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 efficiency 0.75 0.80 0.85 0.90 0.95 1.00 14 v 12 v 9.6 v fig. 5.0v.3: efficiency vs. load current and input voltage for ynl12s10050 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c. ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 5.0v.2: available load current vs. ambient temperature and airflow rates for ynl12s10050 converter mounted horizontally with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 power dissipation [w] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 14 v 12 v 9.6 v fig. 5.0v.4: power loss vs. load current and input voltage for ynl12s10050 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 11 of 26 www.power-one.com fig. 5.0v.5: turn-on transient ( ynl12s10050 ) with application of vin at full rated load current (resistive) and 100 f external capacitance at vin = 12 v. top trace: vin (10 v/div.); bottom trace: output voltage (1 v/div.); time scale: 2 ms/div. fig. 5.0v.7: output voltage response ( ynl12s10050 ) to positive load current step change from 5 a to 10 a with slew rate of 5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div. fig. 5.0v.6: output voltage ripple (20 mv/div.) at full rated load current into a resistive load with external capacitance 100 f ceramic + 1 f ceramic and vin = 12v ( ynl12s10050 ). time scale: 2 s/div. fig. 5.0v.8: output voltage response ( ynl12s10050 ) to negative load current step change from 10 a to 5 a with slew rate of -5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 12 of 26 www.power-one.com ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 3.3v.1: available load current vs. ambient temperature and airflow rates for ynl12s10033 converter mounted vertically with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 effi c i ency 0.75 0.80 0.85 0.90 0.95 1.00 14 v 12 v 9.6 v fig. 3.3v.3: efficiency vs. load current and input voltage for ynl12s10033 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c. ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 3.3v.2: available load current vs. ambient temperature and airflow rates for ynl12s10033 converter mounted horizontally with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 power dissipation [w] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 14 v 12 v 9.6 v fig. 3.3v.4: power loss vs. load current and input voltage for ynl12s10033 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 13 of 26 www.power-one.com fig. 3.3v.5: turn-on transient ( ynl12s10033 ) with application of vin at full rated load current (resistive) and 100 f external capacitance at vin = 12 v. top trace: vin (10 v/div.); bottom trace: output voltage (1 v/div.); time scale: 2 ms/div. fig. 3.3v.7: output voltage response ( ynl12s10033 ) to positive load current step change from 5 a to 10 a with slew rate of 5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div. fig. 3.3v.6: output voltage ripple (20 mv/div.) at full rated load current into a resistive load with external capacitance 100 f ceramic + 1 f ceramic and vin = 12 v ( ynl12s10033 ). time scale: 2 s/div. fig. 3.3v.8: output voltage response ( ynl12s10033 ) to negative load current step change from 10 a to 5 a with slew rate of -5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 14 of 26 www.power-one.com ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 2.5v.1: available load current vs. ambient temperature and airflow rates for ynl12s10025 converter mounted vertically with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 efficiency 0.75 0.80 0.85 0.90 0.95 1.00 14 v 12 v 9.6 v fig. 2.5v.3: efficiency vs. load current and input voltage for ynl12s10025 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c. ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 2.5v.2: available load current vs. ambient temperature and airflow rates for ynl12s10025 converter mounted horizontally with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 power dissipation [w] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 14 v 12 v 9.6 v fig. 2.5v.4: power loss vs. load current and input voltage for ynl12s10025 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 15 of 26 www.power-one.com fig. 2.5v.5: turn-on transient ( ynl12s10025 ) with application of vin at full rate d load current (resistive) and 100 f external capacitance at vin = 12 v. top trace: vin (10 v/div.); bo ttom trace: output voltage (1 v/div.); time scale: 2 ms/div. fig. 2.5v.7: output voltage response ( ynl12s10025 ) to positive load current step change from 5 a to 10 a with slew rate of 5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div. fig. 2.5v.6: output voltage ripple (20 mv/div.) at full rated load current into a resistive load with external capacitance 100 f ceramic + 1 f ceramic and vin = 12 v ( ynl12s10025 ). time scale: 2 s/div. fig. 2.5v.8: output voltage response ( ynl12s10025 ) to negative load current step change from 10 a to 5 a with slew rate of -5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 16 of 26 www.power-one.com ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 2.0v.1: available load current vs. ambient temperature and airflow rates for ynl12s10020 converter mounted vertically with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 efficiency 0.75 0.80 0.85 0.90 0.95 1.00 14 v 12 v 9.6 v fig. 2.0v.3: efficiency vs. load current and input voltage for ynl12s10020 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c. ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 2.0v.2: available load current vs. ambient temperature and airflow rates for ynl12s10020 converter mounted horizontally with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 power dissipation [w] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 14 v 12 v 9.6 v fig. 2.0v.4: power loss vs. load current and input voltage for ynl12s10020 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 17 of 26 www.power-one.com fig. 2.0v.5: turn-on transient ( ynl12s10020 ) with application of vin at full rate d load current (resistive) and 100 f external capacitance at vin = 12 v. top trace: vin (10 v/div.); bo ttom trace: output voltage (1 v/div.); time scale: 2 ms/div. fig. 2.0v.7: output voltage response ( ynl12s10020 ) to positive load current step change from 5 a to 10 a with slew rate of 5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div. fig. 2.0v.6: output voltage ripple (20 mv/div.) at full rated load current into a resistive load with external capacitance 100 f ceramic + 1 f ceramic and vin = 12 v ( ynl12s10020 ). time scale: 2 s/div. fig. 2.0v.8: output voltage response ( ynl12s10020 ) to negative load current step change from 10 a to 5 a with slew rate of -5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 18 of 26 www.power-one.com ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 1.8v.1: available load current vs. ambient temperature and airflow rates ynl12s10018 converter mounted vertically with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 efficiency 0.75 0.80 0.85 0.90 0.95 1.00 14 v 12 v 9.6 v fig. 1.8v.3: efficiency vs. load current and input voltage for ynl12s10018 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c. ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 1.8v.2: available load current vs. ambient temperature and airflow rates for ynl12s10018 converter mounted horizontally with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 power dissipation [w] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 14 v 12 v 9.6 v fig. 1.8v.4: power loss vs. load current and input voltage for ynl12s10018 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 19 of 26 www.power-one.com fig. 1.8v.5: turn-on transient ( ynl12s10018 ) with application of vin at full rate d load current (resistive) and 100 f external capacitance at vin = 12 v. top trace: vin (10 v/div.); bo ttom trace: output voltage (1 v/div.); time scale: 2 ms/div. fig. 1.8v.7: output voltage response ( ynl12s10018 ) to positive load current step change from 5 a to 10 a with slew rate of 5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div. fig. 1.8v.6: output voltage ripple (20 mv/div.) at full rated load current into a resistive load with external capacitance 100 f ceramic + 1 f ceramic and vin = 12 v ( ynl12s10018 ). time scale: 2 s/div. fig. 1.8v.8: output voltage response ( ynl12s10018 ) to negative load current step change from 10 a to 5 a with slew rate of -5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div .
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 20 of 26 www.power-one.com ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 1.5v.1: available load current vs. ambient temperature and airflow rates for ynl12s10015 converter mounted vertically with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 efficienc y 0.70 0.75 0.80 0.85 0.90 0.95 14 v 12 v 9.6 v fig. 1.5v.3: efficiency vs. load current and input voltage for ynl05s10015 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c. ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 1.5v.2: available load current vs. ambient temperature and airflow rates for ynl12s10015 converter mounted horizontally with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 power dissipation [w] 0.0 0.5 1.0 1.5 2.0 14 v 12 v 9.6 v fig. 1.5v.4: power loss vs. load current and input voltage for ynl12s10015 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 21 of 26 www.power-one.com fig. 1.5v.5: turn-on transient ( ynl12s10015 ) with application of vin at full rate d load current (resistive) and 100 f external capacitance at vin = 12 v. top trace: vin (10 v/div.); bo ttom trace: output voltage (1 v/div.); time scale: 2 ms/div. fig. 1.5v.7: output voltage response ( ynl12s10015 ) to positive load current step change from 5 a to 10 a with slew rate of 5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div. fig. 1.5v.6: output voltage ripple (20 mv/div.) at full rated load current into a resistive load with external capacitance 100 f ceramic + 1 f ceramic and vin = 12 v ( ynl12s10015 ). time scale: 2 s/div. fig. 1.5v.8: output voltage response ( ynl12s10015 ) to negative load current step change from 10 a to 5 a with slew rate of -5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 22 of 26 www.power-one.com ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 1.2v.1: available load current vs. ambient temperature and airflow rates for ynl12s10012 converter mounted vertically with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 efficiency 0.70 0.75 0.80 0.85 0.90 0.95 14 v 12 v 9.6 v fig. 1.2v.3: efficiency vs. load current and input voltage for ynl12s10012 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c. ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 1.2v.2: available load current vs. ambient temperature and airflow rates for ynl12s10012 converter mounted horizontally with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 power dissipation [w] 0.0 0.5 1.0 1.5 2.0 14 v 12 v 9.6 v fig. 1.2v.4: power loss vs. load current and input voltage for ynl12s10012 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 23 of 26 www.power-one.com fig. 1.2v.5: turn-on transient ( ynl12s10012 ) with application of vin at full rate d load current (resistive) and 100 f external capacitance at vin = 12 v. top trace: vin (10 v/div.); bo ttom trace: output voltage (1 v/div.); time scale: 2 ms/div. fig. 1.2v.7: output voltage response ( ynl12s10012 ) to positive load current step change from 5 a to 10 a with slew rate of 5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div. fig. 1.2v.6: output voltage ripple (20 mv/div.) at full rated load current into a resistive load with external capacitance 100 f ceramic + 1 f ceramic and vin = 12 v ( ynl12s10012 ). time scale: 2 s/div. fig. 1.2v.8: output voltage response ( ynl12s10012 ) to negative load current step change from 10 a to 5 a with slew rate of -5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 24 of 26 www.power-one.com ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 1.0v.1: available load current vs. ambient temperature and airflow rates for ynl12s10010 converter mounted vertically with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 efficienc y 0.70 0.75 0.80 0.85 0.90 0.95 14 v 12 v 9.6 v fig. 1.0v.3: efficiency vs. load current and input voltage for ynl05s10010 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c. ambient temperature [c] 20 30 40 50 60 70 80 90 load current [adc] 0 2 4 6 8 10 12 500 lfm (2.5 m/s) 400 lfm (2.0 m/s) 300 lfm (1.5 m/s) 200 lfm (1.0 m/s) 100 lfm (0.5 m/s) 30 lfm (0.15 m/s) fig. 1.0v.2: available load current vs. ambient temperature and airflow rates for ynl12s10010 converter mounted horizontally with vin = 12 v, and maximum mosfet temperature 110 c. load current [adc] 024681012 power dissipation [w] 0.0 0.5 1.0 1.5 2.0 14 v 12 v 9.6 v fig. 1.0v.4: power loss vs. load current and input voltage for ynl12s10010 converter mounted vertically with air flowing at a rate of 200 lfm (1 m/s) and ta = 25 c.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 25 of 26 www.power-one.com fig. 1.0v.5: turn-on transient ( ynl12s10010 ) with application of vin at full rate d load current (resistive) and 100 f external capacitance at vin = 12 v. top trace: vin (10 v/div.); bo ttom trace: output voltage (1 v/div.); time scale: 2 ms/div. fig. 1.0v.7: output voltage response ( ynl12s10010 ) to positive load current step change from 5 a to 10 a with slew rate of 5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div. fig. 1.0v.6: output voltage ripple (20 mv/div.) at full rated load current into a resistive load with external capacitance 100 f ceramic + 1 f ceramic and vin = 12 v ( ynl12s10010 ). time scale: 2 s/div. fig. 1.0v.8: output voltage response ( ynl12s10010 ) to negative load current step change from 10 a to 5 a with slew rate of -5 a/ s at vin = 12 v. top trace: output voltage (100 mv/div.); bottom trace: load current (5 a/div.). co = 100 f ceramic. time scale: 20 s/div.
ynl12s100xy dc-dc converter family data sheet 9.6-14 vdc input; 1.0- 5.0 vdc output @ 10a mar 23, 2007 revised to apr 16, 2007 page 26 of 26 www.power-one.com physical information top view (*) pin # 1 rotated 90 6 side view 345 1(*) 2 ynl12s pinout (surface mount) converter part numbering/ordering information product series input voltage mounting scheme rated load current output voltage ? enable logic rohs ynl 12 s 10 018 0 y-series 9.6 ? 14 v s ? surface- mount 10 a (1.0 to 5.0 vdc) 010 ? 1.0 v 012 ? 1.2 v 015 ? 1.5 v 018 ? 1.8 v 020 ? 2.0 v 025 ? 2.5 v 033 ? 3.3 v 050 ? 5.0 v ? 0 ? standard (positive logic) d ? opposite of standard (negative logic) no suffix ? rohs lead-solder- exemption compliant g ? rohs compliant for all six substances the example above describes p/n ynl12s10018-0: 9.6 v ? 14 v input, surface mount, 10 a @ 1.8 v output, standard enable logic, and the rohs lead-solder-exemption featur e. please consult factory regarding availability of a specific version. nuclear and medical applications - power-o ne products are not designed, intended for use in, or authorized for use as critical components in life support systems, equipment used in hazardous env ironments, or nuclear control systems without the express wr itten consent of the respecti ve divisional president of power-one, inc. technical revisions - the appearance of products, including safe ty agency certifications pict ured on labels, may change dependi ng on the date manufactured. specifications are subject to change without notice. pad/pin connections pad/pin # function 1 on/off 2 sense 3 trim 4 vout 5 gnd 6 vin ynl12s platform notes ? all dimensions are in inches [mm] ? connector material: copper ? connector finish: gold over nickel ? module weight: 0.22 oz [6.12 g] ? module height: 0.327? max., 0.301? min. ? recommended surface-mount pads: min. 0.080? x 0.112? [2.03 x 2.84]

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